Company: Synopsys
Position: Intern – Formal Verification Engineer
Location: Bengaluru, Karnataka, India

🔎 Job Description

At Synopsys, we’re driving innovations that shape the way we live and connect. From self-driving cars to learning machines, our technology is at the heart of the Era of Pervasive Intelligence. Join us to transform the future through continuous technological innovation in chip design, verification, and IP integration.

As a Formal Verification Engineer Intern, you’ll work closely with designers, architects, and verification engineers to ensure the reliability and functionality of complex design IPs. You’ll apply formal verification techniques and use HDLs like Verilog and SystemVerilog to help improve the design process.

Subscribe YouTube Channel for Latest Updates

What You’ll Be Doing:

• Deciding on the best applications of formal verification techniques to design parts.
• Reviewing functional and micro-architectural specifications to define the scope of formal verification.
• Creating high-quality formal verification test plans and signing off on design implementations.
• Building formal verification testbenches, coding assertions and constraints, and applying abstraction techniques.
• Applying formal coverage techniques to analyze over-constraints and measure functional coverage.
• Collaborating with the Synopsys Tool Development Group to drive verification projects.

Share the opportunity

The Impact You Will Have:

• Ensuring reliability and functionality of complex design IPs through rigorous formal verification.
• Contributing to the development of high-quality IP that meets stringent client requirements.
• Driving innovation in verification methodologies and techniques.
• Collaborating with a talented team to achieve milestones and goals.
• Enhancing the overall quality and performance of Synopsys’ product offerings.
• Playing a key role in the success of high-profile projects within the company.

Follow us on LinkedIn for latest updates

What You’ll Need:

• Pursuing or completed BTech/MTech in Electrical Engineering, Computer Engineering, or related field.
• Good understanding of hardware micro-architecture and design.
• Proficiency in HDLs like Verilog and SystemVerilog.
• Familiarity with SystemVerilog Assertions (SVA) and formal property verification concepts.
• Good debugging and problem-solving skills.
• Scripting knowledge (Python/Perl/shell).
• Excellent communication and interpersonal skills to work effectively as a team member.

Who You Are:

• An excellent communicator who can articulate complex ideas clearly and effectively.
• A team player who thrives in a collaborative environment.
• A detail-oriented individual with strong analytical and problem-solving skills.
• A proactive learner who stays updated with the latest trends in technology.
• Highly motivated and driven with a passion for technology.